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4H-SiC Epitaxial Wafers for Ultra-High Voltage MOSFETs (100–500 μm, 6 inch)

4H-SiC Epitaxial Wafers for Ultra-High Voltage MOSFETs (100–500 μm, 6 inch)

Nazwa marki: ZMSH
MOQ: 1
Cena £: by case
Szczegóły opakowania: niestandardowe kartony
Warunki płatności: T/t
Szczegółowe informacje
Miejsce pochodzenia:
Chiny
rodzaj przewodnictwa:
Typ N (domieszkowane azotem)
Oporność:
Każdy
Kąt poza osią:
4 ° ± 0,5 ° (zwykle w kierunku [11-20])
Orientacja kryształowa:
(0001) Si-twarz
Grubość:
200–300 µm
Wykończenie powierzchni:
Front: CMP polerowane (gotowe EPI) Z tyłu: Ukupiony lub wypolerowany (najszybsza opcja)
Możliwość Supply:
W sprawie
Opis produktu

Product Overview of 4H-SiC epitaxial wafers

The rapid development of electric vehicles, smart grids, renewable energy, and high-power industrial systems is driving demand for semiconductor devices that can handle higher voltages, greater power densities, and improved efficiency. Among wide bandgap semiconductors, silicon carbide (SiC) has emerged as the material of choice due to its wide bandgap, high thermal conductivity, and superior critical electric field strength.

 

Our 4H-SiC epitaxial wafers are specifically engineered for ultra-high voltage MOSFET applications. With epitaxial layer thickness ranging from 100 μm to 500 μm, these wafers provide the long drift regions required for kV-class power devices. Available in standard specifications of 100 μm, 200 μm, and 300 μm, and built on 6-inch (150 mm) substrates, they combine scalability with excellent material quality, making them an ideal foundation for next-generation power electronics.

4H-SiC Epitaxial Wafers for Ultra-High Voltage MOSFETs (100–500 μm, 6 inch) 0    4H-SiC Epitaxial Wafers for Ultra-High Voltage MOSFETs (100–500 μm, 6 inch) 1


Epitaxial Layer Thickness of 4H-SiC epitaxial wafers

4H-SiC Epitaxial Wafers for Ultra-High Voltage MOSFETs (100–500 μm, 6 inch) 2The epitaxial layer is a critical factor in determining the performance of MOSFET devices, particularly their breakdown voltage and on-resistance trade-off.

  • 100–200 μm layers are well suited for medium-to-high voltage MOSFETs, balancing conduction efficiency and blocking capability.

  • 200–500 μm layers enable ultra-high voltage devices (10 kV and above), providing extended drift regions that sustain higher breakdown fields.

  • Across the entire thickness range, uniformity is carefully controlled within ±2%, ensuring consistency from wafer to wafer and batch to batch.

This flexibility allows device designers to select the most appropriate thickness for their target voltage class while maintaining reproducibility in mass production.


Manufacturing Process of 4H-SiC epitaxial wafers

Our wafers are produced using state-of-the-art Chemical Vapor Deposition (CVD) epitaxial growth technology. This process enables precise control of layer thickness, doping concentration, and 4H-SiC Epitaxial Wafers for Ultra-High Voltage MOSFETs (100–500 μm, 6 inch) 3crystalline quality even at large thicknesses.

  • CVD Epitaxy
    High-purity gases and optimized growth conditions ensure excellent surface morphology and low defect density.

  • Thick Layer Control
    Proprietary process recipes allow for epitaxial thickness up to 500 μm with uniform doping and smooth surfaces, supporting ultra-high voltage MOSFET designs.

  • Doping Uniformity
    Concentration can be customized in the range of 1×10¹⁴ – 1×10¹⁶ cm⁻³, with uniformity better than ±5%. This ensures consistent electrical performance across the wafer.

  • Surface Preparation
    Wafers undergo Chemical Mechanical Polishing (CMP) and rigorous defect inspection. The polished surfaces are compatible with advanced device processes such as gate oxidation, photolithography, and metallization.

 


Key Advantages of 4H-SiC epitaxial wafers

  1. Ultra-High Voltage Capability

    • Thick epitaxial layers (100–500 μm) enable MOSFETs to achieve kV-class breakdown voltages.

  2. Outstanding Crystal Quality

    • Low density of dislocations and basal plane defects (BPDs, TSDs), minimizing leakage currents and ensuring device reliability.

  3. Large Diameter Substrates

    • 6-inch wafers support high-volume manufacturing, reduce cost per device, and improve process compatibility with existing semiconductor lines.

  4. Superior Thermal Properties

    • 4H-SiC’s high thermal conductivity and wide bandgap characteristics ensure devices operate efficiently under high power and temperature conditions.

  5. Customizable Parameters

    • Thickness, doping concentration, wafer orientation, and surface finish can all be tailored to specific MOSFET design requirements.

4H-SiC Epitaxial Wafers for Ultra-High Voltage MOSFETs (100–500 μm, 6 inch) 4    4H-SiC Epitaxial Wafers for Ultra-High Voltage MOSFETs (100–500 μm, 6 inch) 5


Typical Specifications of 4H-SiC epitaxial wafers

Parameter Specification
Conductivity Type N-type (doped with Nitrogen)
Resistivity ANY
Off-Axis Angle 4° ± 0.5° off (typically toward [11-20] direction)
Crystal Orientation (0001) Si-face
Thickness 200–300 µm
Surface Finish Front: CMP polished (epi-ready) Back: lapped or polished (fastest option)
TTV ≤ 10 µm
BOW/Warp ≤ 20 µm

 


Application Areas of 4H-SiC epitaxial wafers

Our 4H-SiC epitaxial wafers are designed for MOSFET devices in ultra-high voltage applications, including:

  • Electric vehicle traction inverters and high-voltage charging modules

  • Smart grid transmission and distribution systems

  • Renewable energy inverters (solar, wind, energy storage)

  • High-power industrial power supplies and switching systems

 

 

FAQ – 4H-SiC Epitaxial Wafers for Ultra-High Voltage MOSFETs

Q1: What is the conductivity type of your SiC epitaxial wafers?
A1: Our wafers are N-type, doped with nitrogen, which is the standard choice for MOSFET and other power device applications.

 

 

Q2: What thicknesses are available for the epitaxial layer?
A2: We provide 100–500 μm epitaxial thickness, with standard offerings at 100 μm, 200 μm, and 300 μm. Custom thicknesses can also be produced upon request.

 

 

Q3: What is the crystal orientation and off-axis angle?
A3: The wafers are oriented on the (0001) Si-face, with an off-axis angle of 4° ± 0.5°, typically toward the [11-20] direction.